Debugging Embedded Software on the Target

Course#: BSEMB1019

About this Course

Course Type Course Code Duration
Embedded Software BSEMB1019 2 Days

Finding and killing latent bugs in embedded software is a difficult business. Heroic efforts and expensive tools are often required to trace backward from an observed crash, hang, or other unplanned run-time behavior to the root cause. In the worst case scenario, the root cause damages the code or data in a subtle way such that the system still appears to work fine or mostly fine-–at least for a while.

Why Attend this Course?

This course teaches engineers how to use inexpensive tools, such as a USB logic analyzer, to locate the top 10 causes of nasty firmware-specific defects. These are the sorts of common anomalies that cannot be easily reproduced in the lab and are thus too-often dismissed as “user errors” or “glitches” only to rear their nasty heads after the product ships to customers. Prevent these ghosts in the machine from living in your system by learning how to debug well despite the limitations of cross-platform debuggers and software tools.

What Makes this Course Stand Apart?

What you will Learn?

Participants will learn how to find and kill common real world embedded-specific firmware bugs in lab exercises that utilize the IAR Embedded Workbench integrated C/C++ compiler-debugger for ARM (link is external), a TI TM4C ARM-Cortex processor board (link is external), and a Saleae logic analyzer (link is external). Each attendee at a public session of this course takes the target hardware and logic analyzer home.

Audience

Embedded software developers

Prerequisites

Working familiarity with the C programming language

Course Outline

Looking Under the Hood
Calling Conventions & Register Usage
C Code vs. Generated Assembly Code (lab exercise)
Linker Command Files and Linker Map Files
Atomicity, Alignment, Word Size, etc.
Top 10 Causes of Nasty Firmware Bugs
Race Condition
Non-Reentrant Function
Missing ‘volatile’ Keyword
Stack Overflow
Heap Fragmentation
Memory Leak
Deadlock
Priority Inversion
Incorrect Priority Assignment
Timing Jitter

Debugging in the Presence of an RTOS
Pre-emption Hazards
RTOS-aware Debuggers
Tracing & Logging (lab exercise)
Debugging at the Hardware Interface (lab exercise)
Debugging at the Hardware Boundary
Reset Issues
Timing Violations (lab exercise)
Low Power Modes
Multi-processor systems
Tales from the Trenches

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